MIP+ | Plasma Die-level Etching

A breakthrough innovation that extends MIP’s proven capabilities from package-level to die-level etching. Developed in collaboration with leading advanced packaging users, MIP+ redefines etching technology. Request information


MIP Plasma exposes die circuitry under Si

New Etching Chemistries

Localized, ion-free solutions for Si, SiO₂, Si₃N₄, and more.
Etching Si with MIP Plasma to Expose Underlying circuitry

Unparalleled Versatility

Atmospheric pressure etching of inorganic and organic materials without ion bombardment.
Selective removal of Si to expose die circuitry

Cutting-Edge Performance

Selectively etches advanced packaging and die materials, while preserving critical underlying features.
Exposed circuitry under Si after MIP Plasma Etching

Expanded Applications

Localized selective etching of die materials for sample preparation for analysis on 2.5D and 3D packages, interposer die, memory die, advanced node Si die, compound semiconductor die.
SiP decap (after MIP)

Package-Level + Die-Level Capabilities

MIP+ enables decapsulation and etching of both packaging and die structures, ensuring deeper insights into semiconductor designs.
MIP Decapsulation is part of the JEDEC Standard

Proven Reliability

Built on the success of MIP’s localized, ion-free etching approach, which has been globally recognized in industry publications and incorporated into standards such as JEDEC JESD22-B120.


Seeing is Believing

JIACO Instruments' MIP+ is not just an evolution of our proven MIP technology—it’s a revolution in precision etching. With the ability to address the challenges of advanced packaging and dies, MIP+ is the trusted solution for failure analysis and reliability testing in the semiconductor industry. Contact us to test your samples with MIP+.

Request information